FAMES pilot line

Innovation in advanced semiconductor technologies for a sovereign European chip industry

Motivation
Towards low-power chips for digital, analog and high-frequency technologies: CEA-Leti and Fraunhofer extend their collaboration in the FAMES pilot line, a pioneering project to promote semiconductor technologies in Europe. This initiative supports the EU Chip Act, which aims to strengthen the EU's technological sovereignty.

Goals

The pilot line will develop five new sets of technologies:

  • FD-SOI (with two new generation nodes at 10nm and 7nm),
  • Several types of embedded non-volatile memories (OxRAM, FeRAM, MRAM and FeFETs),
  • Radio-frequency components (switches, filters and capacitors),
  • Two 3D integration options (heterogeneous integration and sequential integration), and
  • Small inductors to develop DC-DC converters for Power Management Integrated Circuits (PMIC).

Our contribution in the FAMES pilot line

With the combined expertise of Fraunhofer IPMS and IZM-ASSID, we offer a unique environment for the development, integration, and characterization of novel storage materials and stacks on 300 mm wafers. Our goal: to significantly accelerate the path from material idea to functional storage solution. We focus on ferroelectric memory and compute-in-memory (CiM) accelerators.

 

Research at Fraunhofer IPMS includes:

  • Integration of hafnium dioxide (HfO₂) ferroelectrics 
    • Integration of HfO₂-based ferroelectric stacks in CMOS at CEA-Leti
    • Array evaluation of FeRAM and FeMFET
    • Electrical characterization of test structures
    • Benchmarking of material stacks
    • CEA-Leti will perform nanosecond laser annealing on Fraunhofer material
  • Benchmarking and integration of nitride-containing ferroelectrics
    • Scalable “CMOS-friendly” integration concept for nitrides
    • Retention of material properties and reduction of leakage effects
  • Environmental assessment of highly integrated electronics
    • Technology and product-specific analyses from semiconductors to packages to end products
    • Environmentally friendly concepts: low energy consumption, lead-free solutions, extended life cycles, active monitoring and benchmarking at the package and system level
  • Compute-in-Memory (CiM) accelerators
    • Design & Architecture: Development of FeMFET arrays and neuromorphic accelerators
    • Tapeout 1 (Leti): Basic test structures, bit cells, and mini-arrays
    • Tapeout 2 (Leti): Advanced accelerators and arrays for FeMFET and other concepts

  • CEA-Leti (France; project coordination)
  • imec (Belgium)
  • Fraunhofer (Germany)
  • Tyndall (Ireland)
  • VTT (Finland)
  • CEZAMAT WUT (Poland)
  • UCLouvain (Belgium)
  • Silicon Austria Labs (Austria)
  • SiNANO Institute (France)
  • Grenoble INP-UGA (France)
  • University of Granada (Spain)

Funding note

This project has received funding (2023 – 2028) from Horizon Europe and Partners‘ National Public Authorities under GA N°101182297